[Daniel Bailey] built himself a scaled-down clone of a very early computer in an FPGA. Specifically, he wrote some VHDL code to describe the machine in question, a scaled-down clone of the Manchester Small-Scale Experimental Machine with an 8-bit processor and a whopping 8 bytes of RAM, all of which are displayed on an LED screen. Too cool.
That he can get it to do anything at all with such constraints amazes us. Watch him program it and put it through its paces in the video below the break.
The coolest thing about the original “Manchester Baby” is that it retains memory in a Williams tube, which is essentially a CRT with an electrical pickup plate covering up the screen. You know how you get a static charge on the face of an old CRT where the electron beam hit? Well, it turns out that you can read this electric field for a while, and use it as a short-term memory element.
The builders of the SSEM included a second CRT screen so that you could visualize the entire 32×32 bits of memory on a screen, like you would. Naturally, [Daniel] had to replicate this feature on his Manchester Baby clone, but with an 8×8 LED matrix. Now we want one of those for our laptop.
The VHDL is up on Github, as is a Javascript simulator of the machine. And if you’re interested, there’s an active retro-computing Google+ group where this and similar projects are bantied about. And check out some of the earliest computer music, made on a descendant of the Manchester Baby.
Thanks [Ed] for the tip.
Filed under: computer hacks, FPGA
No comments:
Post a Comment