Saturday, September 5

I’m Sorry Dave, You Shouldn’t Write Verilog

We were always envious of Star Trek, for its computers. No programming needed. Just tell the computer what you want and it does it. Of course, HAL-9000 had the same interface and that didn’t work out so well. Some researchers at NYU have taken a natural language machine learning system — GPT-2 — and taught it to generate Verilog code for use in FPGA systems. Ironically, they called it DAVE (Deriving Automatically Verilog from English). Sounds great, but we have to wonder if it is more than a parlor trick. You can try it yourself if you like.

For example, DAVE can take input like “Given inputs a and b, take the nor of these and return the result in c.” Fine. A more complex example from the paper isn’t quite so easy to puzzle out:

Write a 6-bit register ‘ar’ with input
defined as ‘gv’ modulo ‘lj’, enable ‘q’, synchronous
reset ‘r’ defined as ‘yxo’ greater than or equal to ‘m’,
and clock ‘p’. A vault door has three active-low secret
switch pressed sensors ‘et’, ‘lz’, ‘l’. Write combinatorial
logic for a active-high lock ‘s’ which opens when all of
the switches are pressed. Write a 6-bit register ‘w’ with
input ‘se’ and ‘md’, enable ‘mmx’, synchronous reset
‘nc’ defined as ‘tfs’ greater than ‘w’, and clock ‘xx’.

That last example shows the problem with this. Human language is really not so great for describing things like this. Now you not only have to define the problem but also figure out the correct way to say it so that DAVE will spill out the right Verilog code. Normal programming languages might not be so verbose, but you know exactly what some sequence of characters ought to do.

We’ve been here before. COBOL promised to bring programming to everyone by allowing things like “Multiply Rate times Hours giving Pay.” As it turns out, ordinary people still don’t know how to program in COBOL, and people who program want to type “Pay=Rate*Hours” anyway.

Don’t get us wrong. It is an interesting use of GPT-2 and we appreciate the effort. But the reason languages like Verilog and VHDL exist is because they are a compact way to specify what you want with a minimum of ambiguity. We’d rather focus on some of the efforts to convert conventional programming code into Verilog or VHDL. That seems a lot more useful.

We spend enough time yelling at Google Maps to tell it we want to go to Loch Hallow and not Vahalla. Then again, you may disagree. The comments will tell.

No comments:

Post a Comment